1. Field of the Invention
The present invention relates to a field emission device and more particularly to a high-resolution field emission display having a three-electrode structure of a cathode, an anode and a gate electrode.
2. Prior Art
Field emission displays (FEDs) are new, rapidly developing flat panel display technologies. Compared to conventional technologies, e.g., cathode-ray tube (CRT) and liquid crystal display (LCD) technologies, FEDs are superior in having a wider viewing angle, low energy consumption, a smaller size and a higher quality display. In particular, carbon nanotube-based FEDs (CNTFEDs) have attracted much attention in recent years.
Carbon nanotube-based FEDs employ carbon nanotubes (CNTs) as electron emitters. Carbon nanotubes are very small tube-shaped structures essentially having a composition of a graphite sheet rolled into a tube. Carbon nanotubes produced by arc discharge between graphite rods were first discovered and reported in an article by Sumio Iijima entitled “Helical Microtubules of Graphitic Carbon” (Nature, Vol. 354, Nov. 7, 1991, pp. 56-58). Carbon nanotubes can have extremely high electrical conductivity, very small diameters (much less than 100 nanometers), large aspect ratios (i.e. length/diameter ratios) (greater than 1000), and a tip-surface area near the theoretical limit (the smaller the tip-surface area, the more concentrated the electric field, and the greater the field enhancement factor). Thus carbon nanotubes can transmit an extremely high electrical current, and have a very low turn-on electric field (approximately 2 volts/micron) for emitting electrons. In summary, carbon nanotubes are one of the most favorable candidates for electrons emitters for electron emission devices, and can play an important role in field emission display applications. With the development of various different manufacturing technologies for carbon nanotubes, the research of carbon nanotube-based FEDs has yielded promising results.
Generally, FEDs can be roughly classified into diode type structures and triode type structures. Diode type structures have only two electrodes, a cathode electrode and an anode electrode only. Diode type structures are unsuitable for applications requiring high resolution displays, because the diode type structures require high voltages, produce relatively non-uniform electron emissions, and require relatively costly driving circuits. Triode type structures were developed from diode type structures by adding a gate electrode for controlling electron emission. Triode type structures can emit electrons at relatively lower voltages.
FIG. 7 is a cross sectional view illustrating one picture element in a conventional triode type FED. Here, a picture element means a minimum unit of an image displayed by the FED. In a typical color FED, the color picture is obtained by a display system using three optical primary colors, i.e., R(red), G(green) and B(blue). Each one of the colors, e.g. R(red), is comprised in a respective single picture element. As an example of a conventional FED, a structure is explained below, in which electrons are emitted to excite a red fluorescent picture element to emit light.
As shown in FIG. 7, an insulation film 102 (e.g., an SiO2 film 1 micron thick) is deposited on a substrate 101 by sputtering, a gate electrode 103 (e.g., an aluminum film 200 nanometers thick) is deposited on the insulation film 102, and a tubular gate hole 104 is formed penetrating the gate electrode 103 and insulation film 102. An emitter 105 is formed with cathode material deposited on the substrate 101 at a bottom of the gate hole 104. An anode electrode 106 is disposed about 5 millimeters above the substrate 101. Fluorescent material 107 with red fluorescent property is coated on part of the anode electrode 106 located just over the gate hole 104. In use, different voltages are applied to the emitter 105, the anode electrode 106 and the gate electrode 103. For example, about 5.1 kilovolts is applied to the anode electrode 106 and the fluorescent part, about 7.0 volts is applied to the emitter 105 made of cathode material, and about 100 volts is applied to the gate electrode 103. Thereby, equipotential surfaces (not labeled) are formed. Here, a distance between the anode electrode 106 and the gate electrode 103 is about 5 millimeters, and the voltage is about 5000 volts. Thus, an electric field between the both electrodes 106 and 103 is given by:5000/5[V/mm]=1[kV/mm]On the other hand, a distance between the gate electrode 103 and the emitter 105 is 1 micron (10−3 millimeters), and the voltage is 100 volts. So, an electric field between the gate electrode 103 and the emitter 105 is given by:100/10−3[V/mm]=100[kV/mm]Under this configuration, electrons can be extracted from the emitter 105 by the strong electric field of 100 kV/mm. The electrons are then accelerated toward the anode electrode 106 by the normal electric field of 1 kV/mm. However, electrons such as the electrons 110 and 111 diverge in directions getting away from a central axis of the picture element while they travel toward the anode electrode 106. Only a portion of electrons such as the electrons 109 correctly reach the fluorescent material 107 of the target picture element. In FED, the picture elements are generally arranged very closely together. Therefore the divergent elections are liable to reach the fluorescent material 107 of a neighboring picture element. Generally, the fluorescent material 107 of the neighboring picture element is either green or blue, such that a different color is generated. Also, if electrons arrive at fluorescent material 107 of a neighboring red-color's picture element, then a failure in space revolution occurs.
U.S. Pat. No. 6,445,124, granted to Hironori Asai et al., discloses a field emission device structured to resolve the above-described problems. Referring to FIG. 8, the field emission device includes a cathode layer 203 made of a conductive thin film with a thickness of about 0.01 to 0.9 microns, which is formed by deposition or sputtering on an insulation substrate 211. An insulation layer 202 made of SiO2 is formed on the cathode layer 203. A gate electrode 201 is formed on the insulation layer 202. A circular hole (not labeled) with a diameter of 40 to 100 nanometers penetrating the gate electrode 201 and the insulation layer 202 is formed by a reactive ion etching (RIE) process. An electron emissive layer 207 is formed on the cathode layer 203 inside the hole. A ratio of L/S should be equal to or over 1, where S represents an aperture diameter of the hole, and L represents a typical shortest passing distance of electrons emitted from the emissive layer 207 to the gate electrode 201. When the ratio of L/S is equal to or over 1, paths of electrons emitted from the emissive layer 207 are controlled to become narrow. Only electrons that move in a direction approximately vertical to the electron emissive layer 207 can pass through the hole and reach the anode, such that the electrons reach the correct phosphor unit.
However, the efficiency of electron emission is low, because a portion of electrons emitted from the emissive layer 207 are absorbed by the gate electrode 201 or blocked by the insulation layer 202 when they travel in the hole in directions other than the direction perpendicular to the cathode layer 203. The greater the L/S, the more electrons are lost, and the lower the efficiency of electron emission. In addition, a high L/S ratio means a higher voltage applied to the gate electrode is required, in order to generate an electric field strong enough to extract electrons from the emissive layer 207.